Available 2026

PASSAGE™ L200

First Edgeless I/O 3D Co-Packaged Optics.

Passage L200 eliminates the shoreline bottleneck. By stacking the photonic engine vertically with the electronic IC, we deliver 32-64 Tbps of optical I/O per chip—enabling bandwidth densities 5-10× greater than conventional solution.

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Bandwidth

32-64

Tbps Optical I/O

Total I/O

200+

Tbps / Chip

Density

10x

vs Pluggables

Latency

Linear

Drive Architecture

Architecture

Breaking the Shoreline Constraint

The Problem

Conventional chip I/O is confined to the die edges (“shoreline”). As die area scales (r²), perimeter only scales linearly (2πr).

This geometry creates a bandwidth bottleneck: chips run out of edge space long before they run out of compute capability.

The 200 Solution

Edgeless I/O Architecture. We vertically stack the photonic IC (PIC) underneath the electronic IC (EIC).

This allows SerDes to be positioned anywhere across the entire die area, effectively unlocking unlimited bandwidth density scaling.

Configurations

Product Variants

Passage™ L200

32 TBPS OPTICAL I/O

Optimized for next-generation XPUs requiring breakthrough bandwidth density. The standard for 3D co-packaged optics.

3D Vertical Integration
Chip-on-Wafer (CoW)
Detachable Fiber

Passage™ L200X

64 TBPS OPTICAL I/O

Maximum bandwidth variant for ultra-high-density AI infrastructure. Doubles optical I/O density for the most demanding workloads.

2x Bandwidth Density
Same 3D Form Factor
Extreme Scalability

Technical Specifications

Optical Bandwidth

32 Tbps (L200) / 64 Tbps (L200X)

Modulation

PAM4 (56G, 112G)

Integration

3D Chip-on-Wafer (CoW)

Energy Efficiency

< 5 pJ/bit (Optical)

Topology

Edgeless I/O (Area-Array)

Serviceability

Detachable Fiber Connectors

Direct Drive Reach

10m to 2km (DR/FR)