Big Chips for AI

Chips are becoming physically larger and more power hungry due to fundamental, physical limitations of transistors. Compute performance roadmaps are now defined by silicon-area-per-package and the number of processors tightly linked in a high bandwidth scale-up domain. The quest for AGI is driving this trend at warp speed.

This is the way (follow me).

We partner with companies that build high-performance chips1 (like GPUs and switches) to achieve extreme scaling. Connect hundreds to millions of chips together in a single, high bandwidth, low latency interconnect domain. At Lightmatter, we’re blurring the line between scale-up and scale-out networks.